STM32 gotchas
145. Not all TIM input polarity selection created equal (in non-XL 'F1 there's no both-edges selection)

In the STM32 timers, channels selected for Input Capture perform the capture upon edge of the input signal. In the vast majority of STM32 TIM, rising, falling or both-edges can be selected using CCxP and CCxNP bits in TIMx_CCER.

However, in the historically first STM32 family, the 'F1, timers don't have the both-edges option. Only TIMx_CCER.CCxP bit is used to select one of the rising/falling edge and there is no TIMx_CCER.CCxNP bit.

The so-called XL-density STM32F101xx and STM32F103xx microcontrollers with 768kB and 1MB FLASH (i.e. with xF or xG suffix) are a relative late coming addition to the 'F1 family. This is why in these, TIM9..TIM14, which were also an addition only in this sub-family and are not present in other 'F1, already do have the both-edge selection as other STM32 TIM do.