STM32 gotchas
186. Some kernel clocks are not selected/enabled in RCC

In many STM32 dual-clock peripherals, the kernel clock is enabled together with APB clock by a single bit in respective RCC_APBxENRx register. Also, if kernel clock can be selected from multiple choices, this selection is often done in a specialized RCC register (ST confusingly uses various names for this register in different families, including RCC_CFGRx, RCC_DCKCFGRx, RCC_CCIPRx), and the default selection is usually the APB clock. This allows to ignore the existence of separate kernel clock for most users, who don't need a different/asynchronous kernel clock for the peripherals, and then the handling of a given peripheral is identical to models where the same peripheral has single clock.

However, this is not always the case, and there are exceptions to this "rule".

In description of peripherals, the fact that kernel clock source is selected in RCC, is sometimes confusingly described as clock being selected/generated "at product level". This is consequence of manuals being compiled from separately written chapters (in the same manner as the chip itself is compiled from separately designed IP blocks), with little attention paid to adjust the chapters to given STM32 model and to unify terminology/signal names.

Here are some examples of maybe surprising kernel clock enable/selection methods: