188. ... and then there's also no clock enable at all...
Peripherals in STM32 have a clock enable bit, which has to be set before given peripherals can be used in the program. This is so important that it's gotcha number 1.
However, this does not pertain to some of the peripherals, which have clock unconditionally enabled all the time:
RCC itself - obviously, otherwise bits in it could not be set
quite obviously, too, peripherals which are part of the processor, i.e. NVIC and the SBC block of registers
DBGMCU (which is somewhere at the boundary between DBG in processor and the non-processor items) - there are exceptions in 'F0/'L0/'G0
EXTI (for whatever reason) -
there may or may not
(if it turns out to be only ST's documentation error) be an exception to this in 'F410/'F412/'F413
APB interface of RTC - there are several exceptions
IWDG
memories (SRAM, FLASH/FLASH programming interface) - these in some STM32 models/families don't have enable bits at all and are unconditionally enabled all the time,
in some models/familes they have enable bits which may or may not be set by default, and in some models/families they have only low-power enable bits.