STM32 gotchas
196. Not all RTC are created equal

In various STM32 families/models, there are basically three versions of RTC, which were developed historically. AN4759 provides an excellent overview of their capabilities, although it inexplicably omits RTCv11.

RTCv1, used only in the 'F1 family, is basically just a 32-bit counter2, plus a simple alarm.

RTCv2 is used in the majority of "contemporary" STM32 ('F0/'F2/'F3/'F4/'F7/'L0/'L1, most 'L4/'L4+/H7). It features a calendar, but not a counter; two alarms plus a wakeup, input frequency error correction (calibration), synchronization, configurable output pin. Backup registers are now part of the RTC and there's a tamper input, which both clears the backup registers in hardware and provides an interrupt and a timestamp. Atomic calendar readout is supported by a hardware lock mechanism, which unfortunately has a small error propagated across all RTCv2 models (see here, here and here).

RTCv3 is the RTC version present in newest STM32 models ('C0/'G0/'G4/'H5/'L5/'U5 and some newer of 'L4/'L4+/'H7). It adds back the binary counter in addition to calendar (see caveats below) and separates the backup registers and tamper (which has now more features) to a separate TAMP module. (but they are still intimately interconnected, so this makes their usage somewhat more complicated). AN4759 contains a list of STM32 models/families which are equipped by RTCv3 - one maybe surprising element in it is, that while most 'L4 models have RTCv2 the lowest-end 'L41x and highest-end 'L4P5 have RTCv3.

However, not all incarnations of RTCv2 and RTCv3 are the same, across various STM32 families/models. In some models, some features are omitted - while there are more such subtle omissions (and they are well documented again in AN4759), notably, some RTCv2 don't have SSR register, and some RTCv3 don't have the simple counter.

While having a calendar (called "BCD mode" by ST) appears to be beneficial for many simple applications, which only need to keep and display/output local time; it is in fact a major hindrance for any more sophisticated application, where time zones and time differences have to be supported/calculated. In the latter case, the simple counter (called "binary mode" by ST) is a more convenient solution, as these operations are practically impossible to be performed in calendar mode, and conversion to epoch time format and vice versa is inevitable; the simple counter would provide epoch time so only one conversion would need to be performed.

ST effectively undermined this need for both counter and calendar in almost all but a handful of the most modern STM32. In 'F1, while there's understandably no calendar mode (reducing module size on chip manufactured by a relatively old and "large" 180nm technology), the associated "library" (SPL, Cube/HAL) functions use a weird day-incremental method, resulting in subtle but annoying idiosyncracies. There's no counter in RTCv2, and also in most real-world incarnations of RTCv3 counter is not supported. Only some models with RTCv3 do support both counter and calendar (again see AN4759 for this information, mostly the very newest higher-end models plus the 'WL family), and while they can be used simultaneously ("mixed mode"), this usage is restricted to synchronous prescalers ratio being powers of two, as the calendar is incremented when lowermost bits of the (now extended) SSR registers roll over to 0. However, the latter is only a minor nuissance, as the vast majority of applications use the 32.768kHz clock for RTC; as the associated extra logic (basically just the SSR extension and a selector of number of lowermost bits to increment calendar) appears to be minor compared to the rest of RTC, that's why the decision to omit it in some STM32 with RTCv3 is not quite comprehensible.

Also, quite inexplicably, ST included the relatively complex (thus presumably occupying relatively large portion of silicon) RTCv3 in the 'C0 family, which is supposed to be a low-cost "8-bit-killer", and which does not have the VBAT power domain, thus rendering RTC mostly unusable and mostly replaceable by a simple general-purpose or low-power timer.

1. AN4759 also does not use RTCv2/RTCv3 notation. It uses RTC2/RTC3, which in context of numbering peripherals in STM32 RMs is confusing, as it would indicate several instances of RTC within one STM32.

2. The 32-bit counter is split to two 16-bit registers, as it probably originates from some older 16-bit ST microcontrollers (similarly to some other STM32 peripherals). This results in inconvenience when reading it, as there's also no hardware mechanism for atomic readout.