In the upper-end STM32F4* family and in STM32F2, there are two or three SRAMs connected to the busmatrix, available for all purposes, including DMA; and they can be also accessed quasi-bit-wise using the Cortex-M4 bit-banding facility. These SRAMs are mapped in one continuous address space, so that many users are not aware that these are separate memories.
However, many users notice, that their size does not add up to the advertized total SRAM size. The reason is, that there is one more 64kB chunk of RAM, which is NOT connected through the bus-matrix, but it is directly connected to the processor's D (Data) port.
This has several consequences:
- CCM RAM cannot be used for DMA - as it is not connected to the bus-matrix, neither of the two DMA units can access it
- similarly, none of the modules using its own DMA can use it - that includes ETH, OTH_HS (although using DMA is not mandatory for that one) and LTDC (where present)
- CCM RAM is not in continuous address space with other SRAMs
- CCM RAM cannot be used for bit-banding (the bit-band attachment is on the S-port of the processor; this is also reflected in the address space - CCM RAM is addressed at 0x1000'0000 whereas bit-banding RAM area starts at 0x2000'0000)
- code cannot be executed from CCM RAM (as processor fetches code only through its I-port)
- as a special case of the previous constraint, interrupt vector table cannot be placed to CCM RAM (to speed up interrupt execution, upon interrupt entry the vector is fetched through I-port simultaneously with stacking of registers through D- or S-port) - this issue was reported by user with nick bson on eevblog forum
- there's also a positive one - all accesses to CCM RAM are always single-cycle, contrary to accesses to SRAMs through the bus-matrix (S-port imposes a 1-cycle penalty for reads, bus-matrix may impose delays due to arbitration policy and collisions with other masters on the matrix, writes may be delayed due to buffered writes to slow peripherals, etc.)
In particular, if one unknowingly attempts to use CCM RAM at the memory port of DMA, DMA will fail with throwing Transfer Error.
So what's CCM RAM good for? It's really great to keep all the "pure" data in it. The simplest thing to do is to set stack and heap into it; but also data which are not intended for input/output, and/or data upon which extensive calculations are to be made.
* In ST nomenclature, this includes both the Foundation lines and Advanced lines, but excludes the 'F446. It means, 'F405/407/415/417, 'F427/429/437/439, and 'F469/476, all have CCM RAM.