In prototype hardware, unstability is not an unheard of problem. Contrary - although we tend to consider the modern microcontrollers as commonplace, they are still complex high-frequency circuits and deserve attention accordingly. Stability problems tend to be exacerbated with increasing clock frequency.
There are many potential sources for instability, but the power source distribution (including ground) and decoupling belong to prominent ones. However, as increasingly more users are aware of this particular problem, and design accordingly, it appears that in some STM32 families, a different, although related issue comes up surprisingly often. Namely, using inadequate capacitors on VCAP pin(s).
The STM32 are built on technologies requiring a low voltage for the vast majority of digital circuitry - 1.8V and below, depending on family. While on some models this voltage can be supplied externally, this represents a minority, most of the STM32 incorporate an on-chip LDO voltage regulator generating the required "digital" supply voltage from whatever VDD is available (VDD itself determining mainly the IO pins working voltage). The 'F2/'F4/'F7/'H7 families have a relatively high power consumption, so this LDO has an output, marked VCAP, to which an external decoupling capacitor has to be connected.
I believe the reason for this being so often the root of the problem is caused by users misreading the datasheet. While it clearly states that VCAP pins have to be connected to 2.2uF/4.7uF low-ESR (ceramic) capacitors placed closely to the chip, users tend to inadvertently connect the "ceramic" word with nF capacitances, thus populating incorrectly small capacity, resulting in high digital-supply voltage fluctuations and, ultimately, stability problems.
Sometimes, of course, it happens also that the problem is caused by using improper (electrolytic) capacitor, incorrectly routed (long) connections (including ground), or with hand-assembled prototypes, bad solder joints.