STM32 are fairly mutually compatible. There is a great deal of compatibility across all families at least in positioning of the power, reset and oscillator pins, allowing a common board such as the original Nucleo-64 to cater for multiple chips with a dozen or so solder bridges. There are notable exceptions (e.g. LQFP-100 between 'F4 and 'F7 has a whole row of pins shifted by 1; the relatively new chips with the embedded SMPS break compatibility even with the same model number, differing only in suffix), and new 'G0 and 'G4 families deliberately break that sort of compatibility for an optimized power/ground arrangement leaving more signal pins available.

Where the basic pin compatibility is maintained, there's also some compatibility in assigment of peripherals to individual pins. As the different families have different set of peripherals, this is of course far from being universal, but within a family, the "downwards" compatibility is usually maintained quite well.

And, one would expect, that STM32, which have the same basic model number and differ only in suffix, would have the same pin/peripheral layout and would have only different memories sizes and pin number/package, as designated by the suffix.

However, there are surprising exceptions to this.

Perhaps the less surprising are the various variants of the venerable 'F103 model, and the 'F030 model, both in fact representing several different chips, with slightly differing layout of peripherals. These have to be observed carefully in the respective datasheets, should one try to replace one variant of given model with another, either because of need for more memory, or simply because of current (un)availability of a given variant.

One of the most surprising differences within one model can be found in the 'F302/'F303 model, namely between the "lower" B/C-suffixed variant and the "higher" D/E-suffixed variant. While there are slight differences in the behaviour of peripherals (e.g. comparators in the "higher" variant do not have adjustable speed and hysteresis and miss some of the possible input pins available in the "lower" variant), the difference which is a true gotcha, is the absence of PF4 pin in the D/E as compared to the B/C, in LQFP packages smaller than the largest one. The PF4 pin in B/C - for example pin 18 on the LQFP-64 package - is replaced by VSS in the D/E.

Meticulous comparison of the respective datasheets of course reveals this difference, and there's even a "migration" application note available, AN4807, where the two pinouts are highlighted. Nonetheless, changing pin from GPIO to power/ground within one model is not something most users would expect and may present an unpleasant surprise when attempting to use a replacement for any of the reasons already mentioned.