Most of the IO pins in STM32 have the same structure, controlled by GPIO registers:

• direct or switched input to analog features related to the pin
• Schmitt-trigger digital input, which can be switched off if pin is set to Analog mode
• totem-pole Push-Pull output, where number of parallel-connected transistors can be chosen to select slew rate, and the upper transistors can optionally be held off for Open-Drain configuration
• individually switchable pullup and pulldown, both consisting from a true resistor, and a switching transistor
• ESD protection

For most pins, the characteristics are roughly the same: the Schmitt trigger has a leakage of max. 1uA; the output stage can source cca 8mA (or 20mA with degraded output voltages) at high enough OSPEEDR setting, driving a few MHz signals at lowest OSPEEDR setting and frequencies up to the maximum system clock at higher OSPEEDR setting; and the nominal value of pullup and pulldown resistors is cca 40kΩ.

However, exceptions exist, sometimes leading to nasty surprises in a late stage of design, after boards have been designed and populated, and just some pin does not behave as expected.

There are obvious differences in the ESD protection between 3V-only pins (generally marked as TTx in the pinout table in datasheet) and 5V-tolerant (FTx) pins; with the caveat of some FT pins turning non-5V-tolerant, as soon as they are switched to Analog mode (e.g. PA4/PA5 in 'F4, when they are switched to be DMA outputs).

Among the less obvious and thus potentially more surprising exceptions are:

• higher IO leakage of FT pins when voltage on them exceeds their respective supply voltage
• asymmetrically higher (low-level only) current on FTf pins, allowing Fm+ mode of I2C (and high-current IR LED connection)
• asymmetrically lower maximum current on pins which go through the backup-voltage switch (usually PC13-PC15, but may be others)
• surprising and quite poorly documented pullups/pulldowns on the USB-C-PowerDelivery-related pins on 'G0 and 'G4; these pins also tend to have significantly higher leakage
• significantly lower values (nominally 10kΩ) of pullups and pulldowns of PA10 and PB12 in 'F2/'F4/'F7 - related to these pins being OTG_ID pins

Generally, when designing a new circuit, it pays out to read the datasheet to given STM32 carefully, including the GPIO characterization data, even if it is undoubtedly a boring reading.

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