When a peripheral is to use a (non-analog) pin, this pin has to be configured as Alternate Function in a bitfield in GPIOx_MODER, respective to given pin. This connects the pin to the AF matrix. Then, the appropriate peripheral is to be chosen in this matrix in the given pin's GPIOx_AFR[] bitfield.

Normally, it is anticipated, that exactly one pin is connected to a given internal pad of the peripheral. However, in the AF matrix, often several alternative pins can be chosen for one peripheral pad. What happens if several pins are connected to one pad simultaneously? And what happens, if *no* pin is connected?

When multiple pins are assigned to a single peripheral pad, experimental evidence indicates, that if this pad is input, the individual pin's states are simply ORed. Similar experiment indicates, that state of output pads (both enable and state) are simply fan-out to all assigned pins.

When no pin is assigned to a peripheral pad, outputs are simply ignored, and inputs - according to experimental evidence - are set to 0.

Unfortunately, the I/O alternate function input/output subchapter of GPIO chapter of some STM32 Reference manuals has this to say (quoting from RM0090 rev.19 for STM32F4xx):

Note: The application is allowed to select one of the possible peripheral functions for each I/O at a time.

While this note is absent in many if not most STM32 families' RM, it clearly indicates that ST did not design the GPIO matrix consciously and meticulously to allow connecting none or multiple pins to a single peripheral pad. In other words, while the experimental evidence indicates that the "most logical" solution was chosen, there may be surprising exceptions to this, and ST is not intending to document it, so it is not to be used in real-world applications.

Unfortunately.