In the STM32F1xx family, behaviour of IO pins - whether they are digital Input, Output, are connected to some peripheral, or act as Analog - is given by setting them in the GPIO module. However, setting PA15/PB3/PB4 in GPIO alone does not work.
The reason is, that by default these pins are part of the JTAG debug interface1. This is the same as in all other STM32 families - but the surprising thing for those who migrate to 'F1 from other STM32 is, that the GPIO setup does not override the default settings. Instead, users have to remove mapping of these pins to JTAG usage by setting the AFIO_MAPR.SWJ_CFG bitfield2.
There is another group of pins related to the TRACE debug functionality - PB3 (in a different function than when used as part of JTAG) and PE2..PE6 - where mapping these pins to TRACE (by setting DBGMCU_CR.TRACE_IOEN and DBGMCU_CR.TRACE_MODE) overrides the GPIO setting. However, these bits are by default mapped to GPIO, so this does not cause any unpleasant surprise.
1. Also pins PA13 and PA14 are part of SWD/JTAG interface and mapped as such, but that's less surprising as usually the chips are debugged/programmed through SWD so these pins often remain dedicated to this functionality. However, if users wish to use these pins as GPIO, they have to set AFIO_MAPR.SWJ_CFG accordingly, too.
2. Working with AFIO_MAPR.SWJ_CFG bifield, and consequently AFIO_MAPR register, has its own set of issues.